1. Field of the Invention
The present invention relates to a CMOS image sensor and a method for fabricating the same. More particularly, the present invention relates to a vertical CMOS image sensor and a method for fabricating the same, which can reduce pixel size and can ensure isolation characteristics using a shallow trench isolation (STI) process and a selective epitaxy method.
2. Discussion of the Related Art
Generally, an image sensor is a semiconductor device that converts an optical image to an electric signal. In a CCD (charge coupled device) image sensor, a plurality of MOS (metal-oxide-metal) capacitors are arranged close to one another to transfer and store electric charge carriers. In a CMOS (complementary MOS) image sensor, a plurality of MOS transistors corresponding to the number of pixels are fabricated by CMOS technology using a control circuit and a signal processing circuit as peripheral circuits. A switching system of sequentially detecting outputs using the MOS transistors is adopted.
A CMOS image sensor and a method of fabricating the same according to the related art is described with reference to the attached drawings.
FIG. 1 is a cross-sectional view illustrating a CMOS image sensor fabricated by a method of fabricating a CMOS image sensor according to the related art.
A red photodiode 11 is formed on a semiconductor substrate 10 including a first epitaxial layer (not shown). A second epitaxial layer 12 is grown thereon, and a first photoresist pattern (not shown) which exposes a plug region is formed on the second epitaxial layer 12. Ions are injected into the second epitaxial layer 12 exposed by the first photoresist pattern to form a first plug 13 connected to the red photodiode 11 for extracting a signal therefrom. The first photoresist pattern is removed and a second photoresist pattern (not shown) is formed on the second epitaxial layer 12. Ions are injected into the second epitaxial layer 12 exposed by the second photoresist pattern to form a green photodiode 14 in the second epitaxial layer 12. The second photoresist pattern is then removed.
A third epitaxial layer 15 is grown on the second epitaxial layer 12 including the green photodiode 14. A shallow trench isolation (STI) region 16 is formed at an isolation region in the third epitaxial layer 15.
Thereafter, a well process is performed. A third photoresist pattern (not shown) is formed on the third epitaxial layer 15. Then, ions are injected into the third epitaxial layer 15 exposed by the third photoresist pattern to form a second plug 17 connected to the red photodiode 11 and the green photodiode 14.
The method of fabricating the CMOS image sensor according to the related art has the following problems.
Since a diffusion layer is used when the photodiode is formed, there is a limit in ensuring isolation characteristics between pixels and between a plug unrelated to the pixel and the photodiode.
Also, since the photodiode is formed below the STI region, it is difficult to ensure isolation characteristics between the photodiodes. Accordingly, there is a limit in reducing pixel size.